Terasic MAX 10 educational board for Intel FPGA introductory labs.
10M50DAF484C7Gprice unknowneducationcontrol
Enter board slugs separated by commas, for example: sipeed/tang-nano-20k,icebreaker/icebreaker.
Terasic MAX 10 educational board for Intel FPGA introductory labs.
Larger Gowin Tang board for projects that need substantially more logic than Tang Nano and Primer boards.
| Field | DE10-Lite | Tang Mega 138K |
|---|---|---|
| Chip | 10M50DAF484C7G | GW5AST-LV138FPG676A |
| Family | MAX 10 | GW5A |
| Device type | FPGA | FPGA |
| Price | unknown | unknown |
| Toolchains | Intel Quartus Prime | Gowin EDA |
| Open toolchain | no | no |
| Interfaces | VGA, USB-Blaster | not verified |
| Memory | SDRAM requires Terasic manual verification | not verified |
| Documentation | 75 | 45 |
| Difficulty | beginner | professional |
| Openness score | 10 | 35 |
| Where to get help | Terasic support | Sipeed forum |
| Typical risks | MAX 10 is not a Linux-on-FPGA target; use for digital logic and peripheral labs. | This entry intentionally avoids detailed connector claims until official board-revision documents are reviewed. |
| Better for | beginner learning | professional prototyping |