Terasic MAX 10 educational board for Intel FPGA introductory labs.
10M50DAF484C7Gprice unknowneducationcontrol
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Open-source educational Lattice iCE40UP5K board designed around the Yosys, nextpnr and IceStorm flow.
iCE40UP5K-SG48open toolchainprice unknowneducationcontroldspformal
| Field | DE10-Lite | iCEBreaker |
|---|---|---|
| Chip | 10M50DAF484C7G | iCE40UP5K-SG48 |
| Family | MAX 10 | iCE40 UltraPlus |
| Device type | FPGA | FPGA |
| Price | unknown | unknown |
| Toolchains | Intel Quartus Prime | Yosys + nextpnr + IceStorm, Lattice Diamond Programmer |
| Open toolchain | no | yes |
| Interfaces | VGA, USB-Blaster | microUSB FT2232H, FT2232H programming, USB serial |
| Memory | SDRAM requires Terasic manual verification | QSPI flash 128 Mbit |
| Documentation | 75 | 82 |
| Difficulty | beginner | beginner |
| Openness score | 10 | 96 |
| Where to get help | Terasic support | iCEBreaker community docs |
| Typical risks | MAX 10 is not a Linux-on-FPGA target; use for digital logic and peripheral labs. | Check add-on pinout and exact hardware revision before connecting Pmods. |
| Better for | beginner learning | open-source flow |