Terasic Cyclone V SoC board widely used for Intel FPGA education, Linux-on-SoC labs and MiSTer-style retro FPGA work.
5CSEBA6U23I7price unknowneducationlinuxretrorisc-v
Enter board slugs separated by commas, for example: sipeed/tang-nano-20k,icebreaker/icebreaker.
Terasic Cyclone V SoC board widely used for Intel FPGA education, Linux-on-SoC labs and MiSTer-style retro FPGA work.
Small Gowin GW1NR board for low-cost learning, HDMI experiments, softcore demos, and open-source Gowin flow exploration.
| Field | DE10-Nano | Tang Nano 9K |
|---|---|---|
| Chip | 5CSEBA6U23I7 | GW1NR-LV9QN88PC6/I5 |
| Family | Cyclone V SoC | GW1NR / LittleBee |
| Device type | SoC FPGA | FPGA |
| Price | unknown | 14.5 USD |
| Toolchains | Intel Quartus Prime | Gowin EDA, Yosys + nextpnr-gowin + Apicula |
| Open toolchain | no | yes |
| Interfaces | HDMI TX, Ethernet, USB | HDMI, USB Type-C, Onboard JTAG, USB UART |
| Memory | HPS DDR3 requires Terasic manual verification | PSRAM 64 Mbit, Onboard flash 32 Mbit |
| Documentation | 78 | 70 |
| Difficulty | intermediate | beginner |
| Openness score | 20 | 72 |
| Where to get help | Terasic support | r/GowinFPGA |
| Typical risks | Intel tool version and license mode must be checked for the target OS and course lab. | Pinout and constraints must be taken from the exact board revision files, not inferred from this catalog entry. Open-source flow is feature-dependent |
| Better for | community-supported learning | beginner learning |