Terasic Cyclone V SoC board widely used for Intel FPGA education, Linux-on-SoC labs and MiSTer-style retro FPGA work.
5CSEBA6U23I7price unknowneducationlinuxretrorisc-v
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Terasic MAX 10 educational board for Intel FPGA introductory labs.
10M50DAF484C7Gprice unknowneducationcontrol
| Field | DE10-Nano | DE10-Lite |
|---|---|---|
| Chip | 5CSEBA6U23I7 | 10M50DAF484C7G |
| Family | Cyclone V SoC | MAX 10 |
| Device type | SoC FPGA | FPGA |
| Price | unknown | unknown |
| Toolchains | Intel Quartus Prime | Intel Quartus Prime |
| Open toolchain | no | no |
| Interfaces | HDMI TX, Ethernet, USB | VGA, USB-Blaster |
| Memory | HPS DDR3 requires Terasic manual verification | SDRAM requires Terasic manual verification |
| Documentation | 78 | 75 |
| Difficulty | intermediate | beginner |
| Openness score | 20 | 10 |
| Where to get help | Terasic support | Terasic support |
| Typical risks | Intel tool version and license mode must be checked for the target OS and course lab. | MAX 10 is not a Linux-on-FPGA target; use for digital logic and peripheral labs. |
| Better for | community-supported learning | beginner learning |