CLB in PIC MCUs: where an MCU ends and small programmable logic begins

On April 21, 2026, Microchip introduced the PIC16F13276 and PIC18-Q35 families with a Configurable Logic Block that adds CPLD-like logic next to an MCU.

This is not a replacement for FPGAs when a design needs complex RTL, transceivers, or large parallel datapaths. But for timing-critical glue logic, safety startup paths, simple protocol bridging, and BOM reduction, this device class can remove a separate CPLD.

The engineering criterion is simple: if the logic fits in the CLB, does not require a full HDL flow, and timing can be checked with the integrated tool, MCU+CLB can be more pragmatic than a separate FPGA. If the design needs RTL scale, CDC, memory interfaces, or vendor IP, start with an FPGA or SoC FPGA.

Source: https://www.microchip.com/en-us/about/news-releases/products/programmable-logic-redefined-for-simpler-smarter-fully-integrated-designs. Checked by FPGA.camp on 2026-05-08.