Small Gowin GW1NR board for low-cost learning, HDMI experiments, softcore demos, and open-source Gowin flow exploration.
GW1NR-LV9QN88PC6/I5open toolchain14.5 USDeducationvideorisc-vretro
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Enter board slugs separated by commas, for example: sipeed/tang-nano-20k,icebreaker/icebreaker.
Terasic Cyclone V SoC board widely used for Intel FPGA education, Linux-on-SoC labs and MiSTer-style retro FPGA work.
5CSEBA6U23I7price unknowneducationlinuxretrorisc-v
| Field | Tang Nano 9K | DE10-Nano |
|---|---|---|
| Chip | GW1NR-LV9QN88PC6/I5 | 5CSEBA6U23I7 |
| Family | GW1NR / LittleBee | Cyclone V SoC |
| Device type | FPGA | SoC FPGA |
| Price | 14.5 USD | unknown |
| Toolchains | Gowin EDA, Yosys + nextpnr-gowin + Apicula | Intel Quartus Prime |
| Open toolchain | yes | no |
| Interfaces | HDMI, USB Type-C, Onboard JTAG, USB UART | HDMI TX, Ethernet, USB |
| Memory | PSRAM 64 Mbit, Onboard flash 32 Mbit | HPS DDR3 requires Terasic manual verification |
| Documentation | 70 | 78 |
| Difficulty | beginner | intermediate |
| Openness score | 72 | 20 |
| Where to get help | r/GowinFPGA | Terasic support |
| Typical risks | Pinout and constraints must be taken from the exact board revision files, not inferred from this catalog entry. Open-source flow is feature-dependent | Intel tool version and license mode must be checked for the target OS and course lab. |
| Better for | beginner learning | community-supported learning |