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Tang Mega 60K Dock
Sipeed Tang Mega 60K Dock: Gowin GW5AT-60 (Arora V) SOM on a dock board with DDR3, Gigabit Ethernet, HDMI (TX and RX), USB 3.0 and a PCIe card-edge connector.
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Worth knowing
No official Sipeed store price was retrievable on 2026-10-02 (AliExpress page is rendered client-side), so price and availability are left unset.
The litex-boards platform file names the device GW5A-LV60MG121C1/IrES while the Sipeed wiki specifies GW5AT-LV60PG484A; the chip here follows the wiki and Gowin.
Scores and difficulty are editorial estimates, not measured; the entry needs revision-level review of the dock board documents.
Facts
The maker page has not been checked automatically yet.
- FPGA
- GW5AT-LV60PG484AC1/I0
- Family
- Gowin Semiconductor GW5A
- PLL
- 8
- BRAM
- 2124 Kbit
- LUTS
- 59904
- SSRAM
- 468 Kbit
- FLIPFLOPS
- 59904
- BRAMBLOCKS
- 118
- TRANSCEIVERS
- 4
- MULTIPLIERS18X18
- 118
- Memory
- DDR3 4 Gbit (512 MB), Onboard flash 64 Mbit
- Interfaces
- PCIe 2.0 card-edge (x1 mode only at present), USB 3.0 (CH569, 5 Gbps), Gigabit Ethernet, HDMI/DVI (TX and RX), SD slot (1-bit SDIO/MMC or SPI), USB JTAG, USB UART, Differential ADC channels
- Toolchains
- Gowin EDA, LiteX (litex-boards sipeed_tang_mega_60k), openFPGALoader (GW5AT-60)
- Open toolchain
- no
- Level
- Professional
- Status
- in production
- Price
- price at the seller
Documents and examples
Known issues
- PCIe works in x1 mode only. The dock board was designed for GW5AST-LV138. On GW5AT-LV60 SERDES lanes 1 and 3 are swapped, so Sipeed documents PCIe as x1 only for now and notes a possible fix in a future Gowin software update. source
- Minimum Gowin IDE version. GW5AT-LV60PG484A needs the educational IDE 1.9.11.03 or later, or the commercial IDE 1.9.10.03 or later; older versions do not list the device. source
- 3.3 V I/O limit. Sipeed requires 3.3 V IO levels on the GPIO headers; higher voltage can permanently damage the board. source
Where to ask: Sipeed forum, r/GowinFPGA
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