Source is available, but commercial use may require a separate license.
P1M4-M5 candidateMaturity levelMaturity M4-M5 candidate: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale.Manually reviewedgithub
AccelFury af-pdm-rx
Raw PDM RX core на Verilog-2001 для MEMS microphones: генерирует PDM clock, сэмплирует 1-битный поток и выдаёт valid/ready stream. Не выполняет PDM-to-PCM decimation.
Primary risk
How to read riskThe risk banner compresses license clarity and review state into a short verdict. Integration decisions still need tests, synthesis, and board evidence.There are blocking license or reuse risksA separate commercial license may be required.
Source-available limitationManually reviewed
Warnings
4The core does not include a decimator/CIC/FIR pipeline.
Confirmed board evidence with a real microphone is still missing.
Check clock/reset handling and constraints before integration.
Purpose and boundaries
Raw PDM RX core на Verilog-2001 для MEMS microphones: генерирует PDM clock, сэмплирует 1-битный поток и выдаёт valid/ready stream. Не выполняет PDM-to-PCM decimation.
Core kind and readiness
Readiness focusIf the status is not yet reproduced, close license, tests, and board-level evidence gaps first. The fields below are for quick scope checking.Core kind
audio Verilog-2001
Interfaces / buses / flow
PDMVerilator
Still missing before production
2- No reproducible tests or CI smoke are confirmed yet.
- Documentation does not yet look sufficient for quick integration.
Scores
What scores meanEach scale is independent. High usefulness does not cancel a license blocker, and high confidence does not replace board evidence.Quality48
Usefulness72
Integration49
Verification37
Docs40
License42
Beginner42
Professional68
RAG55
Confidence20
Engineering signals
Signals legendSignals show whether useful engineering artefacts are visible. "Yes" does not imply completeness, and "No" often means missing evidence rather than impossible support.TestsCurrent metadata does not show reproducible test evidence yet.
CICurrent metadata does not show confirmed CI yet.
FormalFormal evidence has not been found yet.
DocsDocumentation is not evidence-confirmed yet.
FuseSoCFuseSoC packaging has not been found yet.
Board demoBoard-level demo or target evidence is visible.
Open flowOpen-source FPGA flow compatibility is not confirmed yet.
CommercialCommercial use needs manual license review.
License matrix
Why split by scopeHDL, docs, tests, and generated artifacts can carry different terms. Commercial use is split out so each card does not repeat the same prose.HDLHDLAccelFury Source Available: license value from current metadata.
DocumentationDocumentationUnknown: license evidence is missing for this scope.
TestsTestsUnknown: license evidence is missing for this scope.
ExamplesExamplesUnknown: license evidence is missing for this scope.
ArtifactsArtifactsUnknown: license evidence is missing for this scope.
Commercial useCommercial useunknown_or_manual_review_required: license value from current metadata.
Board compatibility
| Board | Status | Evidence status | Toolchain |
|---|---|---|---|
| Tang Primer 20K Dock | Board statusBoard status: Synthesized for target. Synthesis is confirmed, but this is not a hardware run. | build/program evidence exists; microphone measurement pending | Gowin/Yosys-nextpnr-apicula review |
| Tang Nano 20K | Board statusBoard status: Likely compatible. Likely compatibility still needs local verification. | same Gowin resource class; board constraints and real MEMS microphone test required | Gowin/Yosys-nextpnr-apicula review |
Evidence matrix
How to read evidenceEach group only shows confirmed links. The confidence floor is a lower trust bound, not an absolute verdict.Local verification
1- Try a synthesis smoke run with: Verilator.
Links and alternatives
KB
Alternatives
unknown