Intel FPGA design examples
unknownVendor examples need separate license classification.
vendor examplesUnreviewedunknown
The license requires manual review.
There is a vendor tooling or license constraint.
Comparison helps you see quickly which core carries less license, review, and integration risk.
Vendor examples need separate license classification.
The license requires manual review.
There is a vendor tooling or license constraint.
High-quality IP block library with docs and verification culture.
Manual review is required.
| Signal | Intel FPGA design examples | OpenTitan IP blocks |
|---|---|---|
| Category / source | vendor/examples vendor examples | security/root-of-trust/IP blocks github |
| Review / maturity | Unreviewed unknown | Auto indexed M1-M3 candidate |
| License | unknownUnknown | Apache-2.0Manual review required |
| Evidence / boards | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. |
| Board status | unknown | unknown |
| Tests / CI / formal | Tests: NoCI: NoFormal: No | Tests: YesCI: NoFormal: No |
| Docs / FuseSoC / board demo | Docs: NoFuseSoC: NoBoard demo: No | Docs: NoFuseSoC: NoBoard demo: No |
| Signals | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification |
| Interfaces / buses | unknownunknown | unknownunknown |
| Toolchains | Quartus | Verilator |
| Warnings |
|
|