OpenCores SPI master/slave
M1-M3 candidateCommon reusable peripheral baseline.
opencoresAuto indexedunknown
The license requires manual review.
The source appears stale or legacy.
Comparison helps you see quickly which core carries less license, review, and integration risk.
Common reusable peripheral baseline.
The license requires manual review.
The source appears stale or legacy.
Useful Wishbone-accessible debug core by ZipCPU author.
Manual review is required.
| Signal | OpenCores SPI master/slave | OpenCores WBScope |
|---|---|---|
| Category / source | peripheral/SPI opencores | verification/logic analyzer opencores |
| Review / maturity | Auto indexed M1-M3 candidate | Auto indexed M5 candidate |
| License | unknownUnknown | GPLManual review required |
| Evidence / boards | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. |
| Board status | unknown | unknown |
| Tests / CI / formal | Tests: NoCI: NoFormal: No | Tests: NoCI: NoFormal: No |
| Docs / FuseSoC / board demo | Docs: NoFuseSoC: NoBoard demo: No | Docs: NoFuseSoC: NoBoard demo: No |
| Signals | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification |
| Interfaces / buses | SPI/QSPIunknown | JTAG/debugWishbone |
| Toolchains | Verilator | Verilator |
| Warnings |
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