Compare cores
Up to four cores side by side: maturity, license, tests and activity.
| Attribute | OpenTitan SPI device IP | uart verilog by alexforencich |
|---|---|---|
| Maturity | M4 · Production-ready | M2 · Simulation-tested |
| License | Apache-2.0 · Commercial-friendly | MIT · Commercial-friendly |
| Language | — | — |
| Tests | yes | yes |
| CI | yes | yes |
| Formal | — | — |
| FuseSoC | yes | — |
| Activity | updated today | updated 2 years ago |
| Boards | — | — |
| Interfaces | SPI/QSPI | UART |
| Category | Interfaces and peripherals | Interfaces and peripherals |