pulp-platform common_cells
M1-M3 candidateReusable cells widely used by PULP projects.
githubAuto indexedunknown
The license requires manual review.
Comparison helps you see quickly which core carries less license, review, and integration risk.
Reusable cells widely used by PULP projects.
The license requires manual review.
Central open SoC builder and integration framework.
Manual review is required.
| Signal | pulp-platform common_cells | LiteX |
|---|---|---|
| Category / source | library/SystemVerilog cells github | SoC builder/generator github |
| Review / maturity | Auto indexed M1-M3 candidate | Auto indexed M6 |
| License | unknownUnknown | BSD-2-Clause-like until checkedManual review required |
| Evidence / boards | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. |
| Board status | unknown | unknown |
| Tests / CI / formal | Tests: NoCI: NoFormal: No | Tests: NoCI: NoFormal: No |
| Docs / FuseSoC / board demo | Docs: NoFuseSoC: NoBoard demo: No | Docs: NoFuseSoC: NoBoard demo: No |
| Signals | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification |
| Interfaces / buses | unknownunknown | Memoryunknown |
| Toolchains | Verilator | LiteX, Verilator |
| Warnings |
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