Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributestream_utilsverilog-axistaxiverilog-axi
MaturityM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseISC · Commercial-friendlyMIT · Commercial-friendlyCERN-OHL-S-2.0 · CopyleftMIT · Commercial-friendly
Language————
Testsyesyesyesyes
CI—yesyesyes
Formal————
FuseSoCyes———
Activityupdated 12 months agoupdated 2 years agoupdated 35 days agoupdated 2 years ago
Boards————
InterfacesFIFO/streamFIFO/stream, AXIFIFO/stream, AXIAXI
CategoryBuses and infrastructureBuses and infrastructureBuses and infrastructureBuses and infrastructure