ultraembedded core_soc
unknownSoC integration candidate.
githubUnreviewedunknown
The license requires manual review.
Comparison helps you see quickly which core carries less license, review, and integration risk.
SoC integration candidate.
The license requires manual review.
Useful Wishbone-accessible debug core by ZipCPU author.
Manual review is required.
| Signal | ultraembedded core_soc | OpenCores WBScope |
|---|---|---|
| Category / source | SoC/RISC-V github | verification/logic analyzer opencores |
| Review / maturity | Unreviewed unknown | Auto indexed M5 candidate |
| License | unknownUnknown | GPLManual review required |
| Evidence / boards | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. |
| Board status | unknown | unknown |
| Tests / CI / formal | Tests: NoCI: NoFormal: No | Tests: NoCI: NoFormal: No |
| Docs / FuseSoC / board demo | Docs: NoFuseSoC: NoBoard demo: No | Docs: NoFuseSoC: NoBoard demo: No |
| Signals | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification |
| Interfaces / buses | unknownunknown | JTAG/debugWishbone |
| Toolchains | unknown | Verilator |
| Warnings |
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