Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeverilog-axitaxiverilog-axis
MaturityM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseMIT · Commercial-friendlyCERN-OHL-S-2.0 · CopyleftMIT · Commercial-friendly
Language———
Testsyesyesyes
CIyesyesyes
Formal———
FuseSoC———
Activityupdated 2 years agoupdated 35 days agoupdated 2 years ago
Boards———
InterfacesAXIFIFO/stream, AXIFIFO/stream, AXI
CategoryBuses and infrastructureBuses and infrastructureBuses and infrastructure

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