Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeverilog-ethernetLiteSPIverilog-i2c
MaturityM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseMIT · Commercial-friendlyBSD-2-Clause · Commercial-friendlyMIT · Commercial-friendly
Language—Migen/Python/Verilog—
Testsyesyesyes
CIyesyes—
Formal———
FuseSoC———
Activityupdated 2 years agoupdated 8 days agoupdated 2 years ago
Boards———
InterfacesEthernetSPI/QSPII2C
CategoryInterfaces and peripheralsInterfaces and peripheralsInterfaces and peripherals

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