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Up to four cores side by side: maturity, license, tests and activity.

Attributeverilog-ethernetverilog-i2cuart verilog by alexforencich
MaturityM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseMIT · Commercial-friendlyMIT · Commercial-friendlyMIT · Commercial-friendly
Language———
Testsyesyesyes
CIyes—yes
Formal———
FuseSoC———
Activityupdated 2 years agoupdated 2 years agoupdated 2 years ago
Boards———
InterfacesEthernetI2CUART
CategoryInterfaces and peripheralsInterfaces and peripheralsInterfaces and peripherals

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