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Attributeverilog-i2cLiteSPI
MaturityM2 · Simulation-testedM2 · Simulation-tested
LicenseMIT · Commercial-friendlyBSD-2-Clause · Commercial-friendly
Language—Migen/Python/Verilog
Testsyesyes
CI—yes
Formal——
FuseSoC——
Activityupdated 2 years agoupdated 8 days ago
Boards——
InterfacesI2CSPI/QSPI
CategoryInterfaces and peripheralsInterfaces and peripherals

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