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Up to four cores side by side: maturity, license, tests and activity.

Attributeverilog-i2cOpenTitan SPI device IP
MaturityM2 · Simulation-testedM4 · Production-ready
LicenseMIT · Commercial-friendlyApache-2.0 · Commercial-friendly
Language——
Testsyesyes
CI—yes
Formal——
FuseSoC—yes
Activityupdated 2 years agoupdated 1 day ago
Boards——
InterfacesI2CSPI/QSPI
CategoryInterfaces and peripheralsInterfaces and peripherals

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