Versal AI Engine design with Simulink and Model Composer

Name: Versal AI Engine design with Simulink and Model Composer
Start: 2024-06-26
End: 2024-06-26

OnlineCompletedWebinar

FPGA

Model-based development across programmable logic and AI Engines.

Recording

1 found

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Webinar recording
en
Source: webinar.amd.com

Materials checked: Oct 8, 2026

An example targets a Versal AI Edge device and can be deployed on a VE2302 system-on-module from Avnet. The session examines the split between FPGA fabric and signal-processing engines.

Oct 12 – 15, 2026 United States · San Jose

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