Materials
18 found
- SlidesAccess not confirmedKeynote: From Proven FPGA Innovation to Adaptive Intelligent Systems
Martin Charron, Sr. Director, Technical Marketing, AMD Adaptive and Embedded Computing Group
Source: www.fpgahorizons.com - SlidesAccess not confirmedBitstreams, Backstories & Breakthroughs: A Security Journey in FPGAs
Ted Speers, Technical Fellow
Source: www.fpgahorizons.com - SlidesAccess not confirmedEfficient Vision Pipelines on FPGAs: Design Patterns and Performance Tuning
Hussein Osman, Marketing Director
Source: www.fpgahorizons.com - SlidesAccess not confirmedUsing Altera’s FPGA AI Suite Software to Implement AI-powered Systems
James Moawad, Field Applications Engineer
Source: www.fpgahorizons.com - SlidesAccess not confirmedI Feel the Need for Speed – Recreating the Historic F14 CADC in a FPGA
Adam Taylor, Founder
Source: www.fpgahorizons.com - SlidesAccess not confirmedThe SGET Open Harmonized FPGA Module™ (oHFM) is Here! - Now What?!
Matthew Burns, Director, Technical Marketing
Source: www.fpgahorizons.com - SlidesAccess not confirmedLow Power FPGAs Drive AI to the Edge with Software Defined Hardware Acceleration
Mark Oliver, VP Marketing
Source: www.fpgahorizons.com - SlidesAccess not confirmedCommon Framework for FPGA-based Hardware Root of Trust
Tommi Lampila, Chief Revenue Officer, Partner
Source: www.fpgahorizons.com - SlidesAccess not confirmedMaking Electronics Under Pressure
Bob Storey, Chief Technology Officer
Source: www.fpgahorizons.com - SlidesAccess not confirmedRFSoC at the Edge
Chad Hamilton, Vice President of Products
Source: www.fpgahorizons.com - SlidesAccess not confirmedPanel: From Algorithm to Hardware: Applying Model-Based Design to Real-World Designs
Moderator: Adam Taylor, Adiuvo Engineering/FPGA Horizons Panelists: Udayan Sinha, Senior Manager, Product Marketing, AMD; Noam Levine, Partner Manager, MathWorks; Mark Fosberry, Senior Engineer, The MITRE Corporation / Adjunct Professor at U Mass Lowell
Source: www.fpgahorizons.com - SlidesAccess not confirmedInteractive Session: An Introduction to Signal Integrity for the FPGA/SoC Designer
Matthew Burns, Director, Technical Marketing
Source: www.fpgahorizons.com - SlidesAccess not confirmedThe Enclustra SoM - A Smart Foundation for Embedded Systems
Tony Richtarich, Senior Sales Manager
Source: www.fpgahorizons.com - SlidesAccess not confirmedPrevent Late-Stage FPGA Failures with Advanced RTL Linting and CDC Analysis
Alex Gnusin, Product Manager
Source: www.fpgahorizons.com - SlidesAccess not confirmedOSVVM: A Better Way to Verify Your VHDL Designs
Jim Lewis, VHDL Trainer & OSVVM Chief Architect
Source: www.fpgahorizons.com - SlidesAccess not confirmedLearn about IEEE 1588/PTP timing synchronization and distribution within FPGAs, SoCs, and RFSoCs
Scott Turnbull, Chief Technology Officer & Chief Marketing Officer
Source: www.fpgahorizons.com - SlidesAccess not confirmedSignal Integrity at 112G+ with AMD FPGAs: Designing for Margin at the Edge
Bassam Mansour, Sr. Manager, Technical Marketing, AMD Adaptive and Embedded Computing Group
Source: www.fpgahorizons.com - DocumentFPGA Horizons US East 2026: programmeSource: www.fpgahorizons.com
Materials checked:
The official retrospective reports over 200 attendees and a programme of talks and workshops. The agenda links presentation slides; attendance figures are the organiser’s report.