Materials
91 found
- SlidesAccess not confirmedSpiceBind: Bringing SPICE into RTL Verification
Tomasz Hemperek
Source: fossi-foundation.org - RecordingAccess not confirmedRIVET: An Open-Source Chisel-Generated Multi-Rate Ethernet Subsystem for RISC-V SoCs
Vladimir Milovanović
Source: fossi-foundation.org - SlidesAccess not confirmedRIVET: An Open-Source Chisel-Generated Multi-Rate Ethernet Subsystem for RISC-V SoCs
Vladimir Milovanović
Source: fossi-foundation.org - RecordingAccess not confirmedShapeIC: LUT-Based Hierarchical Exploration for Analog IC Design
Daniel Arevalos
Source: fossi-foundation.org - RecordingAccess not confirmedBorg: An Open-Source GPU, Taped Out End-to-End on Libre Silicon Tools
Andreas Wendleder
Source: fossi-foundation.org - SlidesAccess not confirmedBorg: An Open-Source GPU, Taped Out End-to-End on Libre Silicon Tools
Andreas Wendleder
Source: fossi-foundation.org - RecordingAccess not confirmedSpire: An HDL with Optimization Built In
Felix Arnold
Source: fossi-foundation.org - SlidesAccess not confirmedSpire: An HDL with Optimization Built In
Felix Arnold
Source: fossi-foundation.org - RecordingAccess not confirmedStanding On the Shoulders of Tiny Giants: How Open Silicon Fuels the NotSoTiny RTL Benchmark
Razine Moundir Ghorab
Source: fossi-foundation.org - SlidesAccess not confirmedStanding On the Shoulders of Tiny Giants: How Open Silicon Fuels the NotSoTiny RTL Benchmark
Razine Moundir Ghorab
Source: fossi-foundation.org - RecordingAccess not confirmedRTLForge, Chipchamp and Alwavelets, open agentic tools for chip design and verification
Riadh Ben Abdelhamid
Source: fossi-foundation.org
Materials checked:
The programme combines technical talks and community discussions. The official edition archive provides speaker-attributed recordings and presentation files.