← Back to events

YADRO SoC Design Challenge 2023

In personCompleted
Verilog / SystemVerilogFPGA + SoCEducationRISC-V

Archive of the 2023 YADRO and MIET engineering hackathon in Zelenograd: practical digital-design and verification tasks.

SoC Design Challenge 2023 poster from the MIET website
Image: НИУ МИЭТ / MIET. Official source.

Hackathon tasks

Four tracks: functional verification, physical design, RTL and RTL PRO. The RTL PRO track targeted participants with prior design experience.

Organised by YADRO and MIET. This in-person Zelenograd edition has ended and its registration is closed.

Materials

Official event page and programme

YADRO announcement

Independent preparation

Use the track descriptions to guide RTL practice, verification planning and synthesis-report review. Selection rules from a past edition do not establish the rules for a future hackathon.

Oct 12 – 15, 2026 United States · San Jose

OCP Global Summit 2026

Open infrastructure sessions and Lattice–AMI demonstrations of platform firmware, management and control technologies.