FPGA Development and FPGA AI Suite Hands-on with Agilex 3 and Agilex 5
AI inference with FPGA AI Suite, handwritten-digit recognition on Terasic Atum A3 Nano, and an Agilex 5 demonstration.
FPGA events
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Improving Fmax with Hyper Register on Agilex 3
Hyperflex architecture, Quartus Prime Pro design flow and a practical exercise with Hyper Register.
Altera Innovators Day Tokyo 2026
FPGA technology, software and design-methodology sessions with live demonstrations.
ASP-DAC 2027
VLSI design automation; the call for papers includes reconfigurable FPGA architectures for AI/ML, synthesis, timing analysis and verification.