FPGA events

Event type: Conference Organizer: FPGA-Systems Clear all

10 events

Nov 29, 2025, 10:00–21:00 Russia · MoscowCompleted

FPGA-Systems 2025 with YADRO — Moscow

Recordings from both rooms of the 29 November 2025 conference: RTL, DSP, PCIe prototyping, FPGA-to-ASIC design, verification and physical implementati…

Hybrid Verilog / SystemVerilog FPGA + SoC

Recordings · 2

Jun 1, 2024, 11:00–17:00 Russia · MoscowCompleted

FPGA-Systems 2024.1 with YADRO — Moscow

Recording and slides from the 1 June 2024 conference: SATA on FPGA, AVC/H.264, industrial automation, Simtera and RISC-V.

Hybrid Verilog / SystemVerilog FPGA + SoC

May 25, 2024, 11:00–17:00 Russia · Saint PetersburgCompleted

FPGA-Systems 2024.1 with YADRO — Saint Petersburg

Recording and slides from 25 May 2024: a DDC/DUC transceiver, verification strategy, trusted boot, PyUVM and reusable RTL verification components.

Hybrid Verilog / SystemVerilog FPGA + SoC

Dec 9, 2023 Russia · TomskCompleted

FPGA-Systems 2023.2 supported by YADRO — Tomsk

Recording of the 9 December 2023 conference: SystemVerilog/VHDL in Quartus and Vivado, SpaceWire, SD cards, Simtera, multiply-add and Drawio HDL Build…

Hybrid Verilog / SystemVerilog FPGA + SoC

Recording · 1

Dec 2, 2023 Russia · Saint PetersburgCompleted

FPGA-Systems 2023.2 supported by YADRO — Saint Petersburg

Recording of the 2 December 2023 conference: virtual FPGA labs, QEMU, Simtera, digital predistortion, chip prototypes and iterative builds.

Hybrid Verilog / SystemVerilog FPGA + SoC

Recording · 1

Nov 25, 2023, 10:00–18:00 Russia · MoscowCompleted

FPGA-Systems 2023.2 supported by YADRO — Moscow

25 November 2023 at MIEM and online: LiteX, FPGA bench automation, virtual FPGA, SystemRDL and UVM for DSP. Recording available.

Hybrid Verilog / SystemVerilog FPGA + SoC

Apr 8, 2023 Russia · Saint PetersburgCompleted

FPGA-Systems 2023.1 supported by YADRO — Saint Petersburg

Recording of the 8 April 2023 conference: open synthesis tools, remote FPGA access, Pangomicro, FPGA clusters, DEEDS and timing analysis.

Hybrid Verilog / SystemVerilog FPGA + SoC

Recording · 1

Apr 1, 2023 Russia · MoscowCompleted

FPGA-Systems 2023.1 supported by YADRO — Moscow

Archive of the 1 April 2023 conference: Kria, RTL co-simulation with QEMU and cocotb, Ethernet 10 G, FPGA/ASIC flows and eFPGA.

Hybrid Verilog / SystemVerilog FPGA + SoC

Dec 4, 2021 Russia · Saint PetersburgCompleted

FPGA-Systems 2021 supported by YADRO — Saint Petersburg

Recordings of the 4 December 2021 conference: SystemVerilog event regions, Intel Agilex, eFPGA, Simtera, IC testing and high-level synthesis.

Hybrid Verilog / SystemVerilog FPGA + SoC

Nov 27, 2021 Russia · MoscowCompleted

FPGA-Systems 2021 supported by YADRO — Moscow

Recordings of the 27 November 2021 conference: FPGA verification, NanoXplore, an FPGA mezzanine, Simtera, VUnit and a Kria carrier board.

Hybrid Verilog / SystemVerilog FPGA + SoC