Zephyr RTOS on AMD MicroBlaze V
Project configuration and a first application for the RISC-V soft processor.
147 events
Project configuration and a first application for the RISC-V soft processor.
PCIe Gen4, LPDDR5, transceivers, Ethernet and device security.
Algorithm–architecture co-design for data-science accelerators.
Deterministic vision pipelines using FPGA architectures.
Embedded software support for AMD adaptive SoCs and FPGAs.
FPGA architecture, AI acceleration and security.
Altera strategy, embedded systems and AI at the edge.
RT PolarFire design guidelines, TMR and clock-domain crossings.
Hardware and software implementation of post-quantum cryptography.
NVIDIA, e-con Systems and Lattice discuss camera connectivity and sensor synchronization.