AMD FPGAs and adaptive SoCs for machine vision
Sensor connectivity, deterministic dataflow and AI inference.
FPGA events
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C++ algorithms for FPGA hardware with AMD Vitis HLS
Code profiling and implementation examples in the unified design flow.
Versal AI Engine design with Simulink and Model Composer
Model-based development across programmable logic and AI Engines.
Arm Mali GPU integration in AMD Versal Gen 2
Core partitioning and virtualization for automotive and embedded visualization.
AMD robotics hardware and software: webinar series
Mapping robotics functions to FPGA, SoC, SOM and x86 platforms.
AMD Embedded+: Ryzen and Versal on one board
Sensor fusion, AI inference, industrial networking and control.
AMD Power Design Manager for FPGAs and adaptive SoCs
Device selection, power budgets and thermal estimates.
5G mmWave panel with an AMD adaptive-SoC session
Radio architectures, phased-array modules and the mmWave ecosystem.
Compiler directives for AMD Vitis HLS
Exploring hardware architectures from the same C/C++ model.
Kria KD240 motor-control design with MATLAB and Simulink
Model-based design and field-oriented control with the K24 module.