AMD FPGAs and processors for industrial automation
Machine vision, deterministic control and sensor processing at the edge.
FPGA events
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AMD Versal RF: devices and early RF measurements
RF converters, digital signal processing and the VRK160 evaluation kit.
Vivado design flow for Spartan UltraScale+ FPGAs
Design iterations, timing closure and available IP blocks.
Vitis functional simulation with MATLAB
Calling AI Engine graphs and Vitis HLS programmable-logic kernels from MATLAB.
MATLAB to AMD Vitis HLS workflow
Generating synthesizable C++ with HDL Coder in MATLAB R2025a.
Performance pragmas in AMD Vitis HLS
Translating throughput targets into synthesis constraints.
AMD Alveo V80: AVED and partner implementations
Reference design, low-latency AI inference and FPGA networking.
AMD Versal design tools and architecture: webinar series
Power, thermal design, NoC, transceivers, processors and embedded software.
AMD Versal AI Engine development: webinar series
Architecture, system integration, Model Composer and DSP examples.
RF spectrum processing with Mercury RFS1140
A system-in-package combining AMD Versal AI Core and Jariet data converters.