FPGA events

Feb 1, 2026, 14:55–15:35 Belgium · BrusselsCompleted

FOSDEM 2026: Autonomous SDR platform based on Zynq/AD9361 (extension of PlutoSDR architecture)

SD-card boot, Linux tooling and software deployment for an autonomous Zynq/AD9361 radio platform.

Feb 1, 2026, 13:40–14:10 Belgium · BrusselsCompleted

Synchronising distributed radios using White Rabbit and FPGA clocking resources.

Feb 1, 2026, 10:00–10:15 Belgium · BrusselsCompleted

Open board files, sigrok/PulseView software and Migen/LiteX gateware for a USB3.0 logic analyser.

Feb 1, 2026, 09:20–10:00 Belgium · BrusselsCompleted

The Opulent Voice Protocol and an open hardware implementation for satellite and terrestrial digital radio links.

Jan 31, 2026 Belgium · BrusselsCompleted

5 sessions on open hardware design, FPGA tooling and related silicon projects.

Feb 2, 2025, 09:40–10:00 Belgium · BrusselsCompleted

Integration of an FPGA AI accelerator with open machine-learning software.

Feb 1, 2025, 17:20–17:55 Belgium · BrusselsCompleted

Connecting custom RISC-V hardware functions with Zephyr in an FPGA-based system.

Feb 1, 2025, 14:30–14:55 Belgium · BrusselsCompleted

A test-harness architecture for Linux drivers and physical ARM/FPGA platforms.

Feb 1, 2025, 14:00–14:25 Belgium · BrusselsCompleted

GenZ generates processing-system configuration while OpenXC7 builds the programmable logic for Zynq-7000.

Feb 1, 2025, 10:30–10:55 Belgium · BrusselsCompleted

A CubeSat communications subsystem combining STM32H743 control with a Zynq-7020 accelerator and open hardware.