FPGA-Systems 2025 with YADRO — Moscow
Recordings from both rooms of the 29 November 2025 conference: RTL, DSP, PCIe prototyping, FPGA-to-ASIC design, verification and physical implementati…
3 events
Recordings from both rooms of the 29 November 2025 conference: RTL, DSP, PCIe prototyping, FPGA-to-ASIC design, verification and physical implementati…
Recording and slides from 26 October 2024: FPGA and ASIC physical design, embedded Linux, prototyping, PyUVM and Simtera.
Recording and slides from 25 May 2024: a DDC/DUC transceiver, verification strategy, trusted boot, PyUVM and reusable RTL verification components.