AMD cost-optimized FPGAs: device selection and design
A five-session series on interfaces, power, tools, IP and security.
221 events
A five-session series on interfaces, power, tools, IP and security.
PolarFire FPGA connects sensor interfaces to NVIDIA Holoscan for real-time edge AI.
FPGA design, RISC-V and reconfigurable IP.
Monterey: FPGA architectures, CAD algorithms and high-level synthesis.
AI inference deployment on PolarFire SoC FPGAs.
DSP implementation with FPGA hardware.
Norwegian FPGA conference with engineering talks, vendor sessions and a master’s thesis award.
Integration of an FPGA AI accelerator with open machine-learning software.
Connecting custom RISC-V hardware functions with Zephyr in an FPGA-based system.
A test-harness architecture for Linux drivers and physical ARM/FPGA platforms.