YADRO SoC Design Challenge 2022
Archive of the 2022 YADRO and MIET engineering hackathon in Zelenograd: practical digital-design and verification tasks.
17 events
Archive of the 2022 YADRO and MIET engineering hackathon in Zelenograd: practical digital-design and verification tasks.
Online: FPGA architectures, CAD algorithms and high-level synthesis.
A PCIe data path between an SDR and a GPU, using Artix FPGA gateware with LiteX and host software in Julia.
Integration of GNU Radio with LiteX on an Acorn CLE-215+ PCIe FPGA card for hardware signal processing.
An update on openwifi features, hardware support and development plans following its 2021 work.
7 sessions on open hardware design, FPGA tooling and related silicon projects.
A survey of higher-level languages and compilers used to develop embedded FPGA hardware.