AI/ML Lifecycle Management on FPGA Chipsets With Dynamic Updates
Managing the AI/ML lifecycle in programmable hardware.
FPGA events
Add event59 events
AMD Alveo V80 for memory-intensive workloads
Versal HBM acceleration and the AVED design flow for RTL developers.
Advancing Medical Imaging With Microchip FPGAs
Programmable hardware for medical imaging.
M_AXI interfaces in AMD Vitis HLS
Connecting HLS-generated hardware to external memory.
AMD Versal AI Engines for DSP: webinar series
Architecture, polyphase channelizers and FFT implementation on AIE-ML.
FPGA-Systems 2024.02 × YADRO — Saint Petersburg
Recording and slides from 26 October 2024: FPGA and ASIC physical design, embedded Linux, prototyping, PyUVM and Simtera.
AMD Spartan UltraScale+ FPGA architecture
I/O density, power and security in the cost-optimized device family.
AMD MicroBlaze V: RISC-V soft processor
Processor features, configuration and integration with Vivado and Vitis.
ORConf 2024
Open hardware conference covering HDL tooling, FPGA designs and open silicon projects.
FPGA Focus: The Intelligent Edge in the Post-Quantum Era
Security at the intelligent edge.