AMD Versal AI Engine development: webinar series
Architecture, system integration, Model Composer and DSP examples.
69 events
Architecture, system integration, Model Composer and DSP examples.
A system-in-package combining AMD Versal AI Core and Jariet data converters.
Software verification for safety- and security-critical systems.
Fayetteville: reconfigurable accelerators, programming tools and application-specific computing.
North American open hardware meeting with FPGA, verification and open EDA sessions.
Sequential, pipelined and continuously running hardware modules.
Archive of the 2025 YADRO and MIET engineering hackathon in Zelenograd: practical digital-design and verification tasks.
AI, post-quantum cryptography, CRA and programmable hardware security.
A French-language session on integrating FPGA hardware into a processing system.
A Polish-language session on integrating FPGA hardware into a processing system.