FOSDEM 2026: SucréLA: open source usb 3.0 logic analyzer based on FPGA
Open board files, sigrok/PulseView software and Migen/LiteX gateware for a USB3.0 logic analyser.
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Open board files, sigrok/PulseView software and Migen/LiteX gateware for a USB3.0 logic analyser.
The Opulent Voice Protocol and an open hardware implementation for satellite and terrestrial digital radio links.
5 sessions on open hardware design, FPGA tooling and related silicon projects.
Edge AI, model-based design and FPGA peripheral technologies.
Altera strategy, embedded systems and AI at the edge.
RT PolarFire design guidelines, TMR and clock-domain crossings.
Hardware and software implementation of post-quantum cryptography.
NVIDIA, e-con Systems and Lattice discuss camera connectivity and sensor synchronization.
Machine vision, deterministic control and sensor processing at the edge.
PolarFire SoC multiprocessing and hardware acceleration.