Meeting Fmax targets with AMD Vivado and Versal
Clocking architecture, calibrated deskew and the Advanced Flow.
FPGA events
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FPGA hardware integration into processing systems (German session)
A German-language session on integrating FPGA hardware into a processing system.
Understanding Hart Software Services (HSS) on the PolarFire SoC FPGAs
HSS firmware in PolarFire SoC applications.
Master FPGA Debugging With SmartDebug: the Secret Weapon for Lightning-Fast FPGA Debugging
Hardware inspection and debugging with Microchip SmartDebug.
MUSIC signal processing on AMD Versal AI Engines
Hardware acceleration for direction-of-arrival and spectral estimation.
AMD cost-optimized FPGAs: device selection and design
A five-session series on interfaces, power, tools, IP and security.
FPGA sensor streaming into NVIDIA Holoscan
PolarFire FPGA connects sensor interfaces to NVIDIA Holoscan for real-time edge AI.
Tokyo FPGA Conference 2025
FPGA design, RISC-V and reconfigurable IP.
FPGA 2025
Monterey: FPGA architectures, CAD algorithms and high-level synthesis.
TensorFlow Lite inference with VectorBlox 2.0 on PolarFire SoC
AI inference deployment on PolarFire SoC FPGAs.