FPGA-Systems 2024.02 × YADRO — Moscow
Programme, recording and slides from 30 November 2024: Chisel/Scala, UVM, RISC-V, verification, timing and HDMI on FPGA.
3 events
Programme, recording and slides from 30 November 2024: Chisel/Scala, UVM, RISC-V, verification, timing and HDMI on FPGA.
Recording and slides from the 1 June 2024 conference: SATA on FPGA, AVC/H.264, industrial automation, Simtera and RISC-V.
Archive of the 2024 YADRO and MIET engineering hackathon in Zelenograd: practical digital-design and verification tasks.