FPGA-Systems 2024.1 with YADRO — Saint Petersburg
Recording and slides from 25 May 2024: a DDC/DUC transceiver, verification strategy, trusted boot, PyUVM and reusable RTL verification components.
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YADRO ASIC+RTL+FPGA: Minsk meeting, 2 March 2024
Recording and slides on SoC verification, iterative FPGA builds, automated board testing and FPGA clusters.