FPGA-Systems 2024.02 × YADRO — Moscow
Programme, recording and slides from 30 November 2024: Chisel/Scala, UVM, RISC-V, verification, timing and HDMI on FPGA.
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FPGA-Systems 2024.02 × YADRO — Saint Petersburg
Recording and slides from 26 October 2024: FPGA and ASIC physical design, embedded Linux, prototyping, PyUVM and Simtera.
FPGA-Systems 2024.1 with YADRO — Moscow
Recording and slides from the 1 June 2024 conference: SATA on FPGA, AVC/H.264, industrial automation, Simtera and RISC-V.
FPGA-Systems 2024.1 with YADRO — Saint Petersburg
Recording and slides from 25 May 2024: a DDC/DUC transceiver, verification strategy, trusted boot, PyUVM and reusable RTL verification components.
YADRO SoC Design Challenge 2024
Archive of the 2024 YADRO and MIET engineering hackathon in Zelenograd: practical digital-design and verification tasks.
YADRO ASIC+RTL+FPGA: Minsk meeting, 2 March 2024
Recording and slides on SoC verification, iterative FPGA builds, automated board testing and FPGA clusters.