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AMD updates the Vitis tutorial for a Versal AI Engine/HLS FIR filter
March 27, 2026· AMD Technical Documentation· Guide
The Vitis 2025.2 tutorial shows a system FIR flow for Versal with AI Engines, HLS, and programmable logic.
AMD / XilinxEducationFPGA + SoC
AMD document XD100 “Versal AI Engine/HLS FIR Filter Tutorial” has a March 27, 2026 release date in the Vitis Tutorials 2025.2 English set.
The tutorial is useful for hands-on heterogeneous acceleration on Versal: AI Engines, HLS, programmable logic resources, and graph or simulation analysis through Vitis Analyzer.
Checked by FPGA.camp editors on 2026-04-29 using docs.amd.com.