Decision matrix

How to read the matrixStart with review status, license clarity, and warnings. If records are close, then look at tests, board evidence, and toolchain fit.2/4

AccelFury af-pdm-rx

M4-M5 candidate

Raw PDM RX core на Verilog-2001 для MEMS microphones: генерирует PDM clock, сэмплирует 1-битный поток и выдаёт valid/ready stream. Не выполняет PDM-to-PCM decimation.

githubManually reviewedAccelFury Source Available
Critical

Source is available, but commercial use may require a separate license.

Info

The core does not include a decimator/CIC/FIR pipeline.

SignalAccelFury af-pdm-rxOpenCores WBScope
Category / sourceaudio / sensor interface / PDM RX
github
verification/logic analyzer
opencores
Review / maturityManually reviewed
M4-M5 candidate
Auto indexed
M5 candidate
License
AccelFury Source AvailableManual review required
GPLManual review required
Evidence / boards
EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees.
EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees.
Board status
Synthesized for targetLikely compatible
unknown
Tests / CI / formal
Tests: NoCI: NoFormal: No
Tests: NoCI: NoFormal: No
Docs / FuseSoC / board demo
Docs: NoFuseSoC: NoBoard demo: Yes
Docs: NoFuseSoC: NoBoard demo: No
Signals
QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification
QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification
Interfaces / buses
PDMunknown
JTAG/debugWishbone
ToolchainsVerilatorVerilator
Warnings
  • Source is available, but commercial use may require a separate license.
  • The core does not include a decimator/CIC/FIR pipeline.
  • Confirmed board evidence with a real microphone is still missing.
  • Check clock/reset handling and constraints before integration.
  • Manual review is required.