Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeBlackParrotPicoRV32SERVVexiiRiscv
MaturityM2 · Simulation-testedM2 · Simulation-testedM4 · Production-readyM2 · Simulation-tested
LicenseBSD-3-Clause · Commercial-friendlyISC · Commercial-friendlyISC · Commercial-friendlyMIT · Commercial-friendly
Language—VerilogVerilogSpinalHDL (Scala)
Testsyesyesyesyes
CIyesyesyesyes
Formalyes———
FuseSoC—yesyes—
Activityupdated 1 day agoupdated 25 days agoupdated 38 days agoupdated 4 days ago
Boards————
Interfaces———AXI4, Wishbone, Tilelink, AXI4, Wishbone, Tilelink
CategoryCPUs and computeCPUs and computeCPUs and computeCPUs and compute