LiteX
M6Central open SoC builder and integration framework.
githubAuto indexedBSD-2-Clause-like until checked
Manual review is required.
Comparison helps you see quickly which core carries less license, review, and integration risk.
Central open SoC builder and integration framework.
Manual review is required.
Canonical UART reference and common FuseSoC adaptations.
The license requires manual review.
The source appears stale or legacy.
| Signal | LiteX | OpenCores UART16550 |
|---|---|---|
| Category / source | SoC builder/generator github | peripheral/UART opencores |
| Review / maturity | Auto indexed M6 | Auto indexed M1-M3 candidate |
| License | BSD-2-Clause-like until checkedManual review required | unknown until checkedManual review required |
| Evidence / boards | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. |
| Board status | unknown | unknown |
| Tests / CI / formal | Tests: NoCI: NoFormal: No | Tests: NoCI: NoFormal: No |
| Docs / FuseSoC / board demo | Docs: NoFuseSoC: NoBoard demo: No | Docs: YesFuseSoC: YesBoard demo: No |
| Signals | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification |
| Interfaces / buses | Memoryunknown | UARTunknown |
| Toolchains | LiteX, Verilator | FuseSoC, Verilator |
| Warnings |
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