Comparison helps you see quickly which core carries less license, review, and integration risk.
Canonical UART reference and common FuseSoC adaptations.
The license requires manual review.
The source appears stale or legacy.
Industrial-grade open RISC-V core family source.
Manual review is required.
| Signal | OpenCores UART16550 | OpenHW CORE-V cores |
|---|---|---|
| Category / source | peripheral/UART opencores | processor/RISC-V github |
| Review / maturity | Auto indexedM1-M3 candidateMaturity levelMaturity M1-M3 candidate: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale. | Auto indexedM1-M3 candidateMaturity levelMaturity M1-M3 candidate: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale. |
| License | unknown until checkedunknown_or_manual_review_required | Solderpadunknown_or_manual_review_required |
| Evidence / boards | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. |
| Board status | unknown | unknown |
| Tests / CI / formal | TestsCurrent metadata does not show reproducible test evidence yet.CICurrent metadata does not show confirmed CI yet.FormalFormal evidence has not been found yet. | TestsCurrent metadata does not show reproducible test evidence yet.CICurrent metadata does not show confirmed CI yet.FormalFormal evidence has not been found yet. |
| Docs / FuseSoC / board demo | DocsDocumentation is visible in current metadata.FuseSoCA FuseSoC .core file or compatible packaging is visible.Board demoBoard-level demo or target evidence is not confirmed yet. | DocsDocumentation is not evidence-confirmed yet.FuseSoCFuseSoC packaging has not been found yet.Board demoBoard-level demo or target evidence is not confirmed yet. |
| Signals | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification |
| Interfaces / buses | UARTunknown | unknownunknown |
| Toolchains | FuseSoC, Verilator | Verilator |
| Warnings |
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