Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeSERVBlackParrotVexiiRiscv
MaturityM4 · Production-readyM2 · Simulation-testedM2 · Simulation-tested
LicenseISC · Commercial-friendlyBSD-3-Clause · Commercial-friendlyMIT · Commercial-friendly
LanguageVerilog—SpinalHDL (Scala)
Testsyesyesyes
CIyesyesyes
Formal—yes—
FuseSoCyes——
Activityupdated 38 days agoupdated 1 day agoupdated 4 days ago
Boards———
Interfaces——AXI4, Wishbone, Tilelink, AXI4, Wishbone, Tilelink
CategoryCPUs and computeCPUs and computeCPUs and compute

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