Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeVexRiscvBlackParrotVexiiRiscv
MaturityM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseMIT · Commercial-friendlyBSD-3-Clause · Commercial-friendlyMIT · Commercial-friendly
LanguageSpinalHDL/Scala/Verilog—SpinalHDL (Scala)
Testsyesyesyes
CIyesyesyes
Formal—yes—
FuseSoC———
Activityupdated 5 days agoupdated 1 day agoupdated 4 days ago
Boards———
Interfaces——AXI4, Wishbone, Tilelink, AXI4, Wishbone, Tilelink
CategoryCPUs and computeCPUs and computeCPUs and compute

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