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FPGA-Systems 2024.02 × YADRO — Moscow

HybridCompleted
Verilog / SystemVerilogFPGA + SoCRISC-VOpen-source

Programme, recording and slides from 30 November 2024: Chisel/Scala, UVM, RISC-V, verification, timing and HDMI on FPGA.

FPGA-Systems 2024 conference illustration
Image: YADRO. Official source.

Programme

Topics included Chisel/Scala RTL, fault generation in UVM, Russian EDA tools, AMD GPU support on an FPGA with RISC-V Linux, Step-and-Compare, Extended Useful Skew and HDMI.

Exhibits opened at 10:30, talks started at 11:00 and the programme ended at 18:00. FPGA-Systems held the meetup with YADRO’s support in Moscow and online.

Recordings and slides

Event recording

Chisel/Scala RTL introduction

Fault generation in UVM tests

Open-source Step-and-Compare

HDMI on FPGA

Using the materials

For verification work, start with UVM fault injection and Step-and-Compare; for interfaces, use the HDMI slides. Attendance information on the source page refers to 2024.

Oct 12 – 15, 2026 United States · San Jose

OCP Global Summit 2026

Open infrastructure sessions and Lattice–AMI demonstrations of platform firmware, management and control technologies.

FPGA-Systems 2024.02 × YADRO — Moscow | FPGA.camp