FOSDEM FPGA: materials from 2022–2026
FPGA tracks and individual talks on open tools, hardware description languages and FPGA development.
Completed events from 2022–2026: 21 event or session pages and 84 material links.
FOSDEM 2022: One stop shop: Best Practices for Programming Embedded FPGAs
A survey of higher-level languages and compilers used to develop embedded FPGA hardware.
FOSDEM 2022: Libre-Open VLSI and FPGA
7 sessions on open hardware design, FPGA tooling and related silicon projects.
FOSDEM 2022: Opensource WiFi chip (openwifi) progress and future plan
An update on openwifi features, hardware support and development plans following its 2021 work.
FOSDEM 2022: Implementing a GNU Radio/LiteX accelerator using a FPGA-based PCIe co-processor
Integration of GNU Radio with LiteX on an Acorn CLE-215+ PCIe FPGA card for hardware signal processing.
FOSDEM 2022: P2P SDR to GPU Streaming with Julia and LiteX
A PCIe data path between an SDR and a GPU, using Artix FPGA gateware with LiteX and host software in Julia.
FOSDEM 2023: FPGA-based music synthesis with open-source tools
The eurorack-pmod module and an open-tool workflow for FPGA-based music hardware.
FOSDEM 2023: Building FPGA Bitstreams with Open-Source Tools
Yosys, nextpnr and LiteX for ECP5 systems with a soft RISC-V processor.
FOSDEM 2023: Self-Hosting (Almost) All The Way Down
A 64-bit RISC-V FPGA computer running Fedora and rebuilding its software and FPGA bitstream from source.
FOSDEM 2024: Libre-SOC, FPGA and VLSI devroom
5 sessions on open hardware design, FPGA tooling and related silicon projects.
FOSDEM 2024: Zephyr and RISC-V: I Ain't Afraid Of No Ghosts
Running Zephyr on an FPGA-hosted RISC-V core on UPduino and connecting the embedded hardware resources.
FOSDEM 2024: Maia SDR: an open-source FPGA-based project for AD936x+Zynq radios
Maia SDR uses Amaranth gateware for AD936x/Zynq radios; the talk covers signal processing and IQ data capture.
FOSDEM 2025: SatNOGS-COMMS: An Open-Source Communication Subsystem for CubeSats
A CubeSat communications subsystem combining STM32H743 control with a Zynq-7020 accelerator and open hardware.
FOSDEM 2025: All Open Source Toolchain for ZYNQ 7000 SoCs
GenZ generates processing-system configuration while OpenXC7 builds the programmable logic for Zynq-7000.
FOSDEM 2025: Advanced Test Harness Infrastructure for Validating ARM and FPGA-based Systems
A test-harness architecture for Linux drivers and physical ARM/FPGA platforms.
FOSDEM 2025: Open-Source CPU: Deep-dive into RISC-V CFU and Zephyr
Connecting custom RISC-V hardware functions with Zephyr in an FPGA-based system.
FOSDEM 2025: Accelerating AI with open source hardware and software
Integration of an FPGA AI accelerator with open machine-learning software.
FOSDEM 2026: FPGA and VLSI
5 sessions on open hardware design, FPGA tooling and related silicon projects.
FOSDEM 2026: Open Source Digital Voice for Space and Terrestrial Communications
The Opulent Voice Protocol and an open hardware implementation for satellite and terrestrial digital radio links.
FOSDEM 2026: SucréLA: open source usb 3.0 logic analyzer based on FPGA
Open board files, sigrok/PulseView software and Migen/LiteX gateware for a USB3.0 logic analyser.
FOSDEM 2026: White Rabbit for the masses: distributed coherent SDR on generic FPGA boards
Synchronising distributed radios using White Rabbit and FPGA clocking resources.
FOSDEM 2026: Autonomous SDR platform based on Zynq/AD9361 (extension of PlutoSDR architecture)
SD-card boot, Linux tooling and software deployment for an autonomous Zynq/AD9361 radio platform.