PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

Ibex

processor/RISC-V

Warning

Manual review is required.

Small open RISC-V CPU used by OpenTitan.

LicenseApache-2.0License riskApache-2.0: Current metadata does not show an explicit license blocker.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q54
Use72
Int52
Ver40
SystemVerilogApache-2.0unknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

OpenHW CORE-V cores

processor/RISC-V

Warning

Manual review is required.

Industrial-grade open RISC-V core family source.

LicenseSolderpadLicense riskSolderpad: HDL/docs/tests/examples still need manual review.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q54
Use72
Int52
Ver40
SystemVerilogSolderpadunknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

SERV

processor/RISC-V/tiny

Warning

The license requires manual review.

Tiny RISC-V core and FuseSoC-friendly ecosystem.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q46
Use72
Int76
Ver40
Verilogunknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

OpenHW CV32E40P

processor/RISC-V

Warning

The license requires manual review.

Specific CORE-V core with verification evidence.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use72
Int49
Ver37
SystemVerilogunknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

CORE-V-VERIF

verification/RISC-V

Warning

The license requires manual review.

Verification evidence model for CORE-V cores.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q46
Use72
Int52
Ver40
SystemVerilog/UVMunknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

VexRiscv

processor/RISC-V/generator

Warning

The license requires manual review.

Configurable RISC-V softcore used in LiteX ecosystem.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q46
Use72
Int76
Ver40
SpinalHDL/Scala/Verilogunknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

NEORV32

processor/RISC-V/SoC

Warning

The license requires manual review.

Well-documented VHDL RISC-V SoC candidate.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q46
Use72
Int52
Ver40
VHDLunknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

PicoRV32

processor/RISC-V

Warning

The license requires manual review.

Compact softcore with strong FPGA relevance.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q46
Use72
Int52
Ver40
Verilogunknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

pulp-platform cva6

processor/RISC-V

Warning

The license requires manual review.

Linux-capable RISC-V core lineage.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q46
Use72
Int52
Ver40
SystemVerilogunknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

Rocket Chip

processor/RISC-V/generator

Warning

The license requires manual review.

Important Chisel generator ecosystem.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use72
Int49
Ver37
unknown
PriorityP0 launch: this record is important for baseline catalog coverage and fast comparisons.Review statusReview status: Auto indexed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

Wally RISC-V

processor/RISC-V

Warning

The license requires manual review.

Open RISC-V core family for comparison.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q46
Use54
Int52
Ver40
SystemVerilogunknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

BlackParrot

processor/RISC-V manycore

Warning

The license requires manual review.

Manycore RISC-V candidate.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use54
Int49
Ver37
unknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

BOOM

processor/RISC-V OoO

Warning

The license requires manual review.

High-end RISC-V research core.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use54
Int49
Ver37
unknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

OpenHW CV32E40S

processor/RISC-V/security

Warning

The license requires manual review.

Security-oriented CORE-V core variant.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use54
Int49
Ver37
unknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

OpenHW CV32E40X

processor/RISC-V

Warning

The license requires manual review.

CORE-V core variant.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use54
Int49
Ver37
unknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.
Warning

The license requires manual review.

SoC integration candidate.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use54
Int49
Ver37
unknown
PriorityP1 expansion: useful candidate after the baseline P0 set.Review statusReview status: Unreviewed. Manual review is still required beyond seed/index metadata.Source typeSource type: github. This is record provenance, not endorsement or quality proof.

ultraembedded riscv

processor/RISC-V

Warning

The license requires manual review.

RISC-V core comparison source.

LicenseunknownLicense riskunknown: Commercial use is not confirmed.
EvidencePublic evidence links attached to this record.
BoardsBoard-linked compatibility records, not portability guarantees.
ConfidenceHow strongly the current record is backed by reviewed evidence.
Q40
Use54
Int49
Ver37
unknown