Manual review is required.
P0M7 candidateMaturity levelMaturity M7 candidate: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale.Auto indexedgithub
Ibex
Small open RISC-V CPU used by OpenTitan.
Primary risk
How to read riskThe risk banner compresses license clarity and review state into a short verdict. Integration decisions still need tests, synthesis, and board evidence.Engineering review is still required before integrationCurrent metadata does not show an explicit license blocker.
Lower commercial riskAuto indexed
Warnings
1Purpose and boundaries
Small open RISC-V CPU used by OpenTitan.
Core kind and readiness
Readiness focusIf the status is not yet reproduced, close license, tests, and board-level evidence gaps first. The fields below are for quick scope checking.Core kind
processorSystemVerilog
Interfaces / buses / flow
unknownVerilator
Still missing before production
4- A manual reviewer pass is still needed beyond seed metadata.
- No reproducible tests or CI smoke are confirmed yet.
- Documentation does not yet look sufficient for quick integration.
- There is no board-level evidence with real constraints/report data yet.
Scores
What scores meanEach scale is independent. High usefulness does not cancel a license blocker, and high confidence does not replace board evidence.Quality54
Usefulness72
Integration52
Verification40
Docs40
License76
Beginner42
Professional68
RAG55
Confidence40
Engineering signals
Signals legendSignals show whether useful engineering artefacts are visible. "Yes" does not imply completeness, and "No" often means missing evidence rather than impossible support.TestsCurrent metadata does not show reproducible test evidence yet.
CICurrent metadata does not show confirmed CI yet.
FormalFormal evidence has not been found yet.
DocsDocumentation is not evidence-confirmed yet.
FuseSoCFuseSoC packaging has not been found yet.
Board demoBoard-level demo or target evidence is not confirmed yet.
Open flowOpen-source FPGA flow compatibility is not confirmed yet.
CommercialCurrent metadata does not show an explicit commercial-use blocker.
License matrix
Why split by scopeHDL, docs, tests, and generated artifacts can carry different terms. Commercial use is split out so each card does not repeat the same prose.HDLHDLApache-2.0: license value from current metadata.
DocumentationDocumentationUnknown: license evidence is missing for this scope.
TestsTestsUnknown: license evidence is missing for this scope.
ExamplesExamplesUnknown: license evidence is missing for this scope.
ArtifactsArtifactsUnknown: license evidence is missing for this scope.
Commercial useCommercial useallowed_by_current_metadata: license value from current metadata.
Board compatibility
Compatibility is still unknownSynthesis/implementation evidence and reproducible board reports are still needed.
Evidence matrix
How to read evidenceEach group only shows confirmed links. The confidence floor is a lower trust bound, not an absolute verdict.Source
confidence 2/5Local verification
1- Try a synthesis smoke run with: Verilator.